patch-2.4.21 linux-2.4.21/include/asm-ia64/sn/fetchop.h

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diff -urN linux-2.4.20/include/asm-ia64/sn/fetchop.h linux-2.4.21/include/asm-ia64/sn/fetchop.h
@@ -7,10 +7,11 @@
  * Copyright (c) 2001-2002 Silicon Graphics, Inc.  All rights reserved.
  */
 
-
 #ifndef _ASM_IA64_SN_FETCHOP_H
 #define _ASM_IA64_SN_FETCHOP_H
 
+#include <linux/config.h>
+
 #define FETCHOP_BASENAME	"sgi_fetchop"
 #define FETCHOP_FULLNAME	"/dev/sgi_fetchop"
 
@@ -30,11 +31,71 @@
 #define FETCHOP_CLEAR_CACHE	56
 
 #define FETCHOP_LOAD_OP(addr, op) ( \
-         *(long *)((char*) (addr) + (op)))
+         *(volatile long *)((char*) (addr) + (op)))
 
 #define FETCHOP_STORE_OP(addr, op, x) ( \
-         *(long *)((char*) (addr) + (op)) = \
-              (long) (x))
+         *(volatile long *)((char*) (addr) + (op)) = (long) (x))
+
+#ifdef __KERNEL__
+
+/*
+ * Initialize a FETCHOP line. The argument should point to the beginning
+ * of the line.
+ * 	SN1 - region mask is in word 0, data in word 1
+ * 	SN2 - no region mask. Data in word 0
+ */
+#ifdef CONFIG_IA64_SGI_SN1
+#define FETCHOP_INIT_LINE(p)	*(p) = 0xffffffffffffffffUL
+#elif CONFIG_IA64_SGI_SN2
+#define FETCHOP_INIT_LINE(p)
+#endif
+
+/*
+ * Convert a region 7 (kaddr) address to the address of the fetchop variable
+ */
+#define FETCHOP_KADDR_TO_MSPEC_ADDR(kaddr)	TO_MSPEC(kaddr)
+
+/*
+ * Convert a page struct (page) address to the address of the first
+ * fetchop variable in the page
+ */
+#define FETCHOP_PAGE_TO_MSPEC_ADDR(page)	FETCHOP_KADDR_TO_MSPEC_ADDR(__pa(page_address(page)))
+
+
+/*
+ * Each Atomic Memory Operation (AMO formerly known as fetchop)
+ * variable is 64 bytes long.  The first 8 bytes are used.  The
+ * remaining 56 bytes are unaddressable due to the operation taking
+ * that portion of the address.
+ * 
+ * NOTE: The AMO_t _MUST_ be placed in either the first or second half
+ * of the cache line.  The cache line _MUST NOT_ be used for anything
+ * other than additional AMO_t entries.  This is because there are two
+ * addresses which reference the same physical cache line.  One will
+ * be a cached entry with the memory type bits all set.  This address
+ * may be loaded into processor cache.  The AMO_t will be referenced
+ * uncached via the memory special memory type.  If any portion of the
+ * cached cache-line is modified, when that line is flushed, it will
+ * overwrite the uncached value in physical memory and lead to
+ * inconsistency.
+ */
+typedef struct {
+
+#ifdef CONFIG_IA64_SGI_SN1
+	u64 permissions;
+#endif
+        u64 variable;
+
+#ifdef CONFIG_IA64_SGI_SN1
+        u64 unused[6];
+#else
+        u64 unused[7];
+#endif
+
+} AMO_t;
+
+
+#endif /* __KERNEL__ */
 
 #endif /* _ASM_IA64_SN_FETCHOP_H */
 

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