patch-2.4.10 linux/include/asm-ppc/atomic.h

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diff -u --recursive --new-file v2.4.9/linux/include/asm-ppc/atomic.h linux/include/asm-ppc/atomic.h
@@ -1,5 +1,5 @@
 /*
- * BK Id: SCCS/s.atomic.h 1.8 05/17/01 18:14:24 cort
+ * BK Id: SCCS/s.atomic.h 1.13 08/21/01 16:07:48 trini
  */
 /*
  * PowerPC atomic operations
@@ -7,6 +7,7 @@
 
 #ifndef _ASM_PPC_ATOMIC_H_ 
 #define _ASM_PPC_ATOMIC_H_
+#ifdef __KERNEL__
 
 typedef struct { volatile int counter; } atomic_t;
 
@@ -18,75 +19,137 @@
 extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
 extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
 
-static __inline__ int atomic_add_return(int a, atomic_t *v)
+#ifdef CONFIG_SMP
+#define SMP_ISYNC	"\n\tisync"
+#else
+#define SMP_ISYNC
+#endif
+
+static __inline__ void atomic_add(int a, atomic_t *v)
 {
 	int t;
 
-	__asm__ __volatile__("\n\
-1:	lwarx	%0,0,%3\n\
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%3		# atomic_add\n\
 	add	%0,%2,%0\n\
 	stwcx.	%0,0,%3\n\
 	bne-	1b"
 	: "=&r" (t), "=m" (v->counter)
-	: "r" (a), "r" (v), "m" (v->counter)
+	: "r" (a), "r" (&v->counter), "m" (v->counter)
 	: "cc");
+}
+
+static __inline__ int atomic_add_return(int a, atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%2		# atomic_add_return\n\
+	add	%0,%1,%0\n\
+	stwcx.	%0,0,%2\n\
+	bne-	1b"
+	SMP_ISYNC
+	: "=&r" (t)
+	: "r" (a), "r" (&v->counter)
+	: "cc", "memory");
 
 	return t;
 }
 
-static __inline__ int atomic_sub_return(int a, atomic_t *v)
+static __inline__ void atomic_sub(int a, atomic_t *v)
 {
 	int t;
 
-	__asm__ __volatile__("\n\
-1:	lwarx	%0,0,%3\n\
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%3		# atomic_sub\n\
 	subf	%0,%2,%0\n\
 	stwcx.	%0,0,%3\n\
 	bne-	1b"
 	: "=&r" (t), "=m" (v->counter)
-	: "r" (a), "r" (v), "m" (v->counter)
+	: "r" (a), "r" (&v->counter), "m" (v->counter)
 	: "cc");
+}
+
+static __inline__ int atomic_sub_return(int a, atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%2		# atomic_sub_return\n\
+	subf	%0,%1,%0\n\
+	stwcx.	%0,0,%2\n\
+	bne-	1b"
+	SMP_ISYNC
+	: "=&r" (t)
+	: "r" (a), "r" (&v->counter)
+	: "cc", "memory");
 
 	return t;
 }
 
-static __inline__ int atomic_inc_return(atomic_t *v)
+static __inline__ void atomic_inc(atomic_t *v)
 {
 	int t;
 
-	__asm__ __volatile__("\n\
-1:	lwarx	%0,0,%2\n\
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%2		# atomic_inc\n\
 	addic	%0,%0,1\n\
 	stwcx.	%0,0,%2\n\
 	bne-	1b"
 	: "=&r" (t), "=m" (v->counter)
-	: "r" (v), "m" (v->counter)
+	: "r" (&v->counter), "m" (v->counter)
 	: "cc");
+}
+
+static __inline__ int atomic_inc_return(atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%1		# atomic_inc_return\n\
+	addic	%0,%0,1\n\
+	stwcx.	%0,0,%1\n\
+	bne-	1b"
+	SMP_ISYNC
+	: "=&r" (t)
+	: "r" (&v->counter)
+	: "cc", "memory");
 
 	return t;
 }
 
-static __inline__ int atomic_dec_return(atomic_t *v)
+static __inline__ void atomic_dec(atomic_t *v)
 {
 	int t;
 
-	__asm__ __volatile__("\n\
-1:	lwarx	%0,0,%2\n\
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%2		# atomic_dec\n\
 	addic	%0,%0,-1\n\
 	stwcx.	%0,0,%2\n\
-	bne	1b"
+	bne-	1b"
 	: "=&r" (t), "=m" (v->counter)
-	: "r" (v), "m" (v->counter)
+	: "r" (&v->counter), "m" (v->counter)
 	: "cc");
+}
+
+static __inline__ int atomic_dec_return(atomic_t *v)
+{
+	int t;
+
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%1		# atomic_dec_return\n\
+	addic	%0,%0,-1\n\
+	stwcx.	%0,0,%1\n\
+	bne-	1b"
+	SMP_ISYNC
+	: "=&r" (t)
+	: "r" (&v->counter)
+	: "cc", "memory");
 
 	return t;
 }
 
-#define atomic_add(a, v)		((void) atomic_add_return((a), (v)))
-#define atomic_sub(a, v)		((void) atomic_sub_return((a), (v)))
 #define atomic_sub_and_test(a, v)	(atomic_sub_return((a), (v)) == 0)
-#define atomic_inc(v)			((void) atomic_inc_return((v)))
-#define atomic_dec(v)			((void) atomic_dec_return((v)))
 #define atomic_dec_and_test(v)		(atomic_dec_return((v)) == 0)
 
 /*
@@ -97,16 +160,17 @@
 {
 	int t;
 
-	__asm__ __volatile__("\n"
-"1:	lwarx	%0,0,%2\n"
-"	addic.	%0,%0,-1\n"
-"	blt	2f\n"
-"	stwcx.	%0,0,%2\n"
-"	bne	1b\n"
-"2:"
-	: "=&r" (t), "=m" (v->counter)
-	: "r" (&v->counter), "m" (v->counter)
-	: "cc");
+	__asm__ __volatile__(
+"1:	lwarx	%0,0,%1		# atomic_dec_if_positive\n\
+	addic.	%0,%0,-1\n\
+	blt-	2f\n\
+	stwcx.	%0,0,%1\n\
+	bne-	1b"
+	SMP_ISYNC
+	"\n\
+2:"	: "=&r" (t)
+	: "r" (&v->counter)
+	: "cc", "memory");
 
 	return t;
 }
@@ -116,4 +180,5 @@
 #define smp_mb__before_atomic_inc()	smp_mb()
 #define smp_mb__after_atomic_inc()	smp_mb()
 
+#endif /* __KERNEL__ */
 #endif /* _ASM_PPC_ATOMIC_H_ */

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