patch-2.4.19 linux-2.4.19/include/asm-mips64/spinlock.h

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diff -urN linux-2.4.18/include/asm-mips64/spinlock.h linux-2.4.19/include/asm-mips64/spinlock.h
@@ -19,10 +19,10 @@
 
 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
 
-#define spin_lock_init(x)	do { (x)->lock = 0; } while(0);
+#define spin_lock_init(x)	do { (x)->lock = 0; } while(0)
 
 #define spin_is_locked(x)	((x)->lock != 0)
-#define spin_unlock_wait(x)	({ do { barrier(); } while ((x)->lock); })
+#define spin_unlock_wait(x)	do { barrier(); } while ((x)->lock)
 
 /*
  * Simple spin lock operations.  There are two variants, one clears IRQ's
@@ -44,8 +44,8 @@
 	"beqz\t%1, 1b\n\t"
 	" sync\n\t"
 	".set\treorder"
-	: "=o" (lock->lock), "=&r" (tmp)
-	: "o" (lock->lock)
+	: "=m" (lock->lock), "=&r" (tmp)
+	: "m" (lock->lock)
 	: "memory");
 }
 
@@ -56,8 +56,8 @@
 	"sync\n\t"
 	"sw\t$0, %0\n\t"
 	".set\treorder"	
-	: "=o" (lock->lock)
-	: "o" (lock->lock)
+	: "=m" (lock->lock)
+	: "m" (lock->lock)
 	: "memory");
 }
 
@@ -95,6 +95,8 @@
 
 #define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
 
+#define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
+
 static inline void read_lock(rwlock_t *rw)
 {
 	unsigned int tmp;
@@ -108,8 +110,8 @@
 	"beqz\t%1, 1b\n\t"
 	" sync\n\t"
 	".set\treorder"	
-	: "=o" (rw->lock), "=&r" (tmp)
-	: "o" (rw->lock)
+	: "=m" (rw->lock), "=&r" (tmp)
+	: "m" (rw->lock)
 	: "memory");
 }
 
@@ -126,10 +128,10 @@
 	"sub\t%1, 1\n\t"
 	"sc\t%1, %0\n\t"
 	"beqz\t%1, 1b\n\t"
-	"sync\n\t"
+	" sync\n\t"
 	".set\treorder"	
-	: "=o" (rw->lock), "=&r" (tmp)
-	: "o" (rw->lock)
+	: "=m" (rw->lock), "=&r" (tmp)
+	: "m" (rw->lock)
 	: "memory");
 }
 
@@ -146,8 +148,8 @@
 	"beqz\t%1, 1b\n\t"
 	" sync\n\t"
 	".set\treorder"	
-	: "=o" (rw->lock), "=&r" (tmp)
-	: "o" (rw->lock)
+	: "=m" (rw->lock), "=&r" (tmp)
+	: "m" (rw->lock)
 	: "memory");
 }
 
@@ -158,8 +160,8 @@
 	"sync\n\t"
 	"sw\t$0, %0\n\t"
 	".set\treorder"	
-	: "=o" (rw->lock)
-	: "o" (rw->lock)
+	: "=m" (rw->lock)
+	: "m" (rw->lock)
 	: "memory");
 }
 

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