patch-2.4.19 linux-2.4.19/include/asm-mips64/mmu_context.h

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diff -urN linux-2.4.18/include/asm-mips64/mmu_context.h linux-2.4.19/include/asm-mips64/mmu_context.h
@@ -14,7 +14,7 @@
 #include <linux/config.h>
 #include <linux/slab.h>
 #include <asm/pgalloc.h>
-#include <asm/processor.h>
+#include <asm/pgtable.h>
 
 /*
  * For the fast tlb miss handlers, we currently keep a per cpu array
@@ -27,7 +27,7 @@
 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
 	pgd_current[smp_processor_id()] = (unsigned long)(pgd)
 #define TLBMISS_HANDLER_SETUP() \
-	set_context((unsigned long) smp_processor_id() << (23 + 3)); \
+	set_context(((long)(&pgd_current[smp_processor_id()])) << 23); \
 	TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 extern unsigned long pgd_current[];
 
@@ -52,14 +52,15 @@
 #define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
 #define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
 
-extern inline void
-get_new_cpu_mmu_context(struct mm_struct *mm, unsigned long cpu)
+static inline void
+get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
 {
 	unsigned long asid = ASID_CACHE(cpu);
 
 	if (! ((asid += ASID_INC) & ASID_MASK) ) {
-		_flush_tlb_all(); /* start new asid cycle */
-		if (!asid)      /* fix version if needed */
+		flush_icache_all();
+		local_flush_tlb_all();	/* start new asid cycle */
+		if (!asid)		/* fix version if needed */
 			asid = ASID_FIRST_VERSION;
 	}
 	CPU_CONTEXT(cpu, mm) = ASID_CACHE(cpu) = asid;
@@ -69,7 +70,7 @@
  * Initialize the context related info for a new mm_struct
  * instance.
  */
-extern inline int
+static inline int
 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
 #ifndef CONFIG_SMP
@@ -88,14 +89,14 @@
 	return 0;
 }
 
-extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk, unsigned cpu)
 {
 	/* Check if our ASID is of an older version and thus invalid */
 	if ((CPU_CONTEXT(cpu, next) ^ ASID_CACHE(cpu)) & ASID_VERSION_MASK)
-		get_new_cpu_mmu_context(next, cpu);
+		get_new_mmu_context(next, cpu);
 
-	set_entryhi(CPU_CONTEXT(cpu, next) & 0xff);
+	set_entryhi(CPU_CONTEXT(cpu, next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 }
 
@@ -103,7 +104,7 @@
  * Destroy context related info for an mm_struct that is about
  * to be put to rest.
  */
-extern inline void destroy_context(struct mm_struct *mm)
+static inline void destroy_context(struct mm_struct *mm)
 {
 #ifdef CONFIG_SMP
 	if (mm->context)
@@ -115,13 +116,13 @@
  * After we have set current->mm to a new value, this activates
  * the context for the new mm so we see the new mappings.
  */
-extern inline void
+static inline void
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
 	/* Unconditionally get a new ASID.  */
-	get_new_cpu_mmu_context(next, smp_processor_id());
+	get_new_mmu_context(next, smp_processor_id());
 
-	set_entryhi(CPU_CONTEXT(smp_processor_id(), next) & 0xff);
+	set_entryhi(CPU_CONTEXT(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 }
 

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