patch-2.4.19 linux-2.4.19/arch/mips64/mm/loadmmu.c

• Lines: 88
• Date: Fri Aug 2 17:39:43 2002
• Orig file: linux-2.4.18/arch/mips64/mm/loadmmu.c
• Orig date: Sun Sep 9 10:43:02 2001

diff -urN linux-2.4.18/arch/mips64/mm/loadmmu.c linux-2.4.19/arch/mips64/mm/loadmmu.c
@@ -17,21 +17,26 @@
 #include <asm/pgtable.h>
 #include <asm/system.h>
 #include <asm/bootinfo.h>
-#include <asm/sgialib.h>
+#include <asm/cpu.h>
 
 /* memory functions */
 void (*_clear_page)(void * page);
 void (*_copy_page)(void * to, void * from);
 
 /* Cache operations. */
+void (*_flush_cache_all)(void);
+void (*___flush_cache_all)(void);
 void (*_flush_cache_mm)(struct mm_struct *mm);
 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
                            unsigned long end);
 void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
+void (*_flush_cache_sigtramp)(unsigned long addr);
+void (*_flush_icache_range)(unsigned long start, unsigned long end);
+void (*_flush_icache_page)(struct vm_area_struct *vma, struct page *page);
 void (*_flush_page_to_ram)(struct page * page);
+void (*_flush_icache_all)(void);
 
 /* MIPS specific cache operations */
-void (*_flush_cache_sigtramp)(unsigned long addr);
 void (*_flush_cache_l2)(void);
 void (*_flush_cache_l1)(void);
 
@@ -41,25 +46,18 @@
 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
 
-/* TLB operations. */
-void (*_flush_tlb_all)(void);
-void (*_flush_tlb_mm)(struct mm_struct *mm);
-void (*_flush_tlb_range)(struct mm_struct *mm, unsigned long start,
-			unsigned long end);
-void (*_flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
-
 /* Miscellaneous. */
-void (*update_mmu_cache)(struct vm_area_struct * vma,
-			 unsigned long address, pte_t pte);
-
-void (*_show_regs)(struct pt_regs *);
+void (*_update_mmu_cache)(struct vm_area_struct * vma,
+	unsigned long address, pte_t pte);
 
 extern void ld_mmu_r4xx0(void);
 extern void ld_mmu_andes(void);
+extern void ld_mmu_sb1(void);
+extern void sb1_tlb_init(void);
 
 void __init load_mmu(void)
 {
-	switch(mips_cputype) {
+	switch(mips_cpu.cputype) {
 #if defined (CONFIG_CPU_R4300)						\
     || defined (CONFIG_CPU_R4X00)					\
     || defined (CONFIG_CPU_R5000)					\
@@ -79,17 +77,23 @@
 	case CPU_R5000:
 	case CPU_R5000A:
 	case CPU_NEVADA:
-		printk("Loading R4000 MMU routines.\n");
+		printk(KERN_INFO "Loading R4000 MMU routines.\n");
 		ld_mmu_r4xx0();
 		break;
 #endif
-
-#if defined (CONFIG_CPU_R10000)
+#ifdef CONFIG_CPU_R10000
 	case CPU_R10000:
-		printk("Loading R10000 MMU routines.\n");
+		printk(KERN_INFO "Loading R10000 MMU routines.\n");
 		ld_mmu_andes();
 		break;
 #endif
+#if defined CONFIG_CPU_SB1
+	case CPU_SB1:
+		printk(KERN_INFO "Loading SB1 MMU routines.\n");
+		ld_mmu_sb1();
+		sb1_tlb_init();
+		break;
+#endif
 
 	default:
 		/* XXX We need an generic routine in the MIPS port